TM DSG SiNT MOSFET with a inner gate and outer gate are shown with

I On /I Off ratio comparison of this work with literature

SS and DIBL comparison of this work with reports in literature

TM DSG SiNT MOSFET with a inner gate and outer gate are shown with

Anil VOHRA, Professor (Full), M.Sc., Ph.D

Effect of 3 nm gate length scaling in junctionless double

SS and DIBL comparison of this work with reports in literature

Anil VOHRA, Professor (Full), M.Sc., Ph.D

TM DSG SiNT MOSFET with a inner gate and outer gate are shown with

I-V curves for Non-graded base SiGe HBT

ION/IOFF ratio comparison of this work with reports in literature

Photo-generation Rate generated in the model.

Subband profile along the device length (left), and current